PetroStreet

A SIL-2 shutdown loop has experienced several spurious trips. Would you modify proof test intervals or redesign the architecture? How would you decide?

The first step is to understand whether the issue is related to:
Random hardware failures
Systematic/design issues
Proof test induced errors
Process/environmental conditions
Common cause failures
Poor instrument selection or installation
The decision should be based on a structured review. I would be immediately change the proof tests interval or redesign the architecture.

If reliability data shows the SIL-2 target is already being achieved but availability is suffering, I would generally favor architecture optimization (e.g., voting logic, diagnostics, redundancy) over simply shortening proof test intervals. This approach usually reduces nuisance trips while maintaining the required SIL.

Explain me what sort of architecture optimization would you apply?

It can be in the form of sensor voting, redundancy of final element, applying better diagnosis, or segregating process trips from instrument faults.

So proof test interval should not be the first thing to do rather looking into voting, redundancy should be given a priority?